Design and Implementation of Error Correction Circuits for RISC-V Based Systems in Space Applications

R. Kiran Kumar, Sk. Abdul Azeez, P. Bharath Kumar, K. Ganesh

2025

Abstract

RISC-V, an open and extensible Instruction Set Architecture (ISA), is becoming increasingly popular for space applications due to its flexibility and scalability. This paper focuses on implementing error correction circuits on RISC-V processors, particularly using the RV32IM instruction set, to enhance reliability in space environments prone to radiation effects such as single-event upsets (SEUs). We adopt a 5-stage pipeline design to optimize processing and implement the system on a DE10 Lite FPGA platform for testing. The study evaluates several error correction methods, including Hamming codes, Reed- Solomon, and Error Correction Codes (ECC), assessing their effectiveness in reducing data corruption. By examining performance, power efficiency, and fault tolerance, the research highlights how RISC-V systems can be tailored for robust operation in space applications.

Paper Citation

in Harvard Style

Kumar R., Azeez S., Kumar P. and Ganesh K. (2025). Design and Implementation of Error Correction Circuits for RISC-V Based Systems in Space Applications. In Proceedings of the 1st International Conference on Research and Development in Information, Communication, and Computing Technologies - ICRDICCT`25; ISBN 978-989-758-777-1, SciTePress, pages 622-627. DOI: 10.5220/0013939500004919

in Bibtex Style

@conference{icrdicct`2525,
author={R. Kumar and Sk. Azeez and P. Kumar and K. Ganesh},
title={Design and Implementation of Error Correction Circuits for RISC-V Based Systems in Space Applications},
booktitle={Proceedings of the 1st International Conference on Research and Development in Information, Communication, and Computing Technologies - ICRDICCT`25},
year={2025},
pages={622-627},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0013939500004919},
isbn={978-989-758-777-1},
}

in EndNote Style

TY - CONF

JO - Proceedings of the 1st International Conference on Research and Development in Information, Communication, and Computing Technologies - ICRDICCT`25
TI - Design and Implementation of Error Correction Circuits for RISC-V Based Systems in Space Applications
SN - 978-989-758-777-1
AU - Kumar R.
AU - Azeez S.
AU - Kumar P.
AU - Ganesh K.
PY - 2025
SP - 622
EP - 627
DO - 10.5220/0013939500004919
PB - SciTePress