Enhancing Arithmetic Operations with HUB Posit: A Hardware Efficient Approach

G. Charan Kumar, M. Anil Kumar, G. Charan Teja Naik, P. Vasanth

2025

Abstract

The responsivity was further improved with the positâ„¢ format that replaced the IEEE 754 standard in 2017, offering more accuracy and broader uniformity across different systems. However, it is still less competitive than IEEE 754 in its functional units. HUB, introduced in 2016 to reduce the cost of hardware. This short introduces a new format, referred to as HUB posit, which is proposed to help reduce the posit units' hardware overhead. The results show that adders and multipliers are able to achieve area-delay product values lower than those of previous works of up to 15% and 12%, respectively keeping the same accuracy. In addition, the synthesis indicates that the operation of HUB posit units may be performed at higher frequencies than those of classical one.

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Paper Citation


in Harvard Style

Kumar G., Kumar M., Naik G. and Vasanth P. (2025). Enhancing Arithmetic Operations with HUB Posit: A Hardware Efficient Approach. In Proceedings of the 1st International Conference on Research and Development in Information, Communication, and Computing Technologies - Volume 2: ICRDICCT`25; ISBN 978-989-758-777-1, SciTePress, pages 304-308. DOI: 10.5220/0013881900004919


in Bibtex Style

@conference{icrdicct`2525,
author={G. Kumar and M. Kumar and G. Naik and P. Vasanth},
title={Enhancing Arithmetic Operations with HUB Posit: A Hardware Efficient Approach},
booktitle={Proceedings of the 1st International Conference on Research and Development in Information, Communication, and Computing Technologies - Volume 2: ICRDICCT`25},
year={2025},
pages={304-308},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0013881900004919},
isbn={978-989-758-777-1},
}


in EndNote Style

TY - CONF

JO - Proceedings of the 1st International Conference on Research and Development in Information, Communication, and Computing Technologies - Volume 2: ICRDICCT`25
TI - Enhancing Arithmetic Operations with HUB Posit: A Hardware Efficient Approach
SN - 978-989-758-777-1
AU - Kumar G.
AU - Kumar M.
AU - Naik G.
AU - Vasanth P.
PY - 2025
SP - 304
EP - 308
DO - 10.5220/0013881900004919
PB - SciTePress