A Scalable High-Speed Hybrid Full Adder Design Based on XOR- XNOR Gates

Sukanya K, Venkatram N, D Devi Vara Prasad, Y Jaipalreddy, A Prashanth, V T Ram Pavan Kumar M

2025

Abstract

XOR-XNOR-based Full-swing Adder that is scalable and FinFET is described in this report. FinFET technology has been employed as an alternative to bulk CMOS in ultra-low power designs since it offers several advantages such as more effective channel management, reduced energy consumption, faster switching, and so on. Previous research has compared the influence of this new technology on the circuit and evaluated the performance gains that may be obtained. In comparison to the suggested adders, the state of the art comprises certain known adders in FinFET technology. The suggested full adders improve Silicon area by 19.35 percent, Average Power by 33.59 percent, Propagation Delay by 36.15 percent, Area Delay Product (ADP) by 56.22 percent, and Power Delay Product by 57.59 percent as compared to the previous full Adder. Compared to the Mirror CMOS full adder Furthermore, performance characteristics had been investigated. By increasing the in the extended adder structures, Full Adders to 32 bits are used without the addition of level restoring buffers In-between stages. According to the modelling results, the planned full adder and 5 of the 11 current full adders can be increased to 32 bits in practice. The suggested full adder outperformed the competition. The 32-bit mode of operation the suggested hybrid full adder can be more effective due to its improved features and it can be a more stable and superior option than present full adders.

Paper Citation

in Harvard Style

K S., N V., Devi Vara Prasad D., Jaipalreddy Y., Prashanth A. and Ram Pavan Kumar M V. (2025). A Scalable High-Speed Hybrid Full Adder Design Based on XOR- XNOR Gates. In Proceedings of the 3rd International Conference on Futuristic Technology - Volume 2: INCOFT; ISBN 978-989-758-763-4, SciTePress, pages 429-434. DOI: 10.5220/0013594000004664

in Bibtex Style

@conference{incoft25,
author={Sukanya K and Venkatram N and D Devi Vara Prasad and Y Jaipalreddy and A Prashanth and V T Ram Pavan Kumar M},
title={A Scalable High-Speed Hybrid Full Adder Design Based on XOR- XNOR Gates},
booktitle={Proceedings of the 3rd International Conference on Futuristic Technology - Volume 2: INCOFT},
year={2025},
pages={429-434},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0013594000004664},
isbn={978-989-758-763-4},
}

in EndNote Style

TY - CONF

JO - Proceedings of the 3rd International Conference on Futuristic Technology - Volume 2: INCOFT
TI - A Scalable High-Speed Hybrid Full Adder Design Based on XOR- XNOR Gates
SN - 978-989-758-763-4
AU - K S.
AU - N V.
AU - Devi Vara Prasad D.
AU - Jaipalreddy Y.
AU - Prashanth A.
AU - Ram Pavan Kumar M V.
PY - 2025
SP - 429
EP - 434
DO - 10.5220/0013594000004664
PB - SciTePress