VLSI Implementation of Deep Learning Models for Real-Time Object Detection in Robotics

D. Jayalakshmi, P. Arivazhagi, K. Dhivyalakshmi

2025

Abstract

Very Large-Scale Integration (VLSI) technology is one of the fastest-growing sectors, having made it possible to gain deep learning models for real-time object detection in the robotics world. Almost the very traditional way of deep learning-based object detection is the thorough need of graphical processing units (GPUs) and cloud-based processing, which have a major disadvantage in terms of latency and power inefficiencies. The article shows the prospect of using VLSI as an alternative to speed up the computations of deep learning models that are used in the robot's application, and to decrease the power consumption and data speed as well. The use of designs that are customized through hardware architectures strengthens the real-time abilities of the visual of robots, making them more suitable for edge-based self-governing choice-making. In comparison to conventional GPU-based resolutions, the research introduces an optimized Field Programmable Gate Array (FPGA)-based hardware accelerator meant for deep learning models to enable faster inference with dramatically decreased power consumption. Moreover, besides the implementation of a hybrid method involving quantization and pruning in VLSI circuits, the memory footprint is also reduced, and the computational overload is kept low, while the detection accuracy remains high. By introducing two innovative algorithms, the most recent advancement in robotics is achieved with a single stride. An adaptive sparse convolutional neural network (ASCNN) is a dynamically adjustable network that maintains the number of active neurons and convolutional filters in accordance with the complexity of the input image. This method enhances the efficiency of computation and improves the precision of detection. However, the Hardware-Aware Low-Latency YOLO (HALO-YOLO) is a refined version of the YOLO model that is specifically designed for FPGA and ASIC hardware devices. This results in a significant reduction in the consumption of computing resources in a short amount of time, as well as the rapid and efficient detection of objects. Experimental evaluations that verify the implementation of VLSI-based deep learning and these two algorithms demonstrate that they are capable of achieving low-latency object detection, which is appropriate for real-time surveillance applications, industrial automation, and autonomous robotics. Based on the results, it can be inferred that the hardware-aware optimisation of the deep learning model in robotics is a suitable method for real-time object detection. This research establishes the groundwork for the future investigation of AI accelerators that are low-power and high-speed, specifically designed for autonomous robotic vision systems.

Paper Citation

in Harvard Style

Jayalakshmi D., Arivazhagi P. and Dhivyalakshmi K. (2025). VLSI Implementation of Deep Learning Models for Real-Time Object Detection in Robotics. In Proceedings of the 1st International Conference on Research and Development in Information, Communication, and Computing Technologies - ICRDICCT`25; ISBN 978-989-758-777-1, SciTePress, pages 718-726. DOI: 10.5220/0013942700004919

in Bibtex Style

@conference{icrdicct`2525,
author={D. Jayalakshmi and P. Arivazhagi and K. Dhivyalakshmi},
title={VLSI Implementation of Deep Learning Models for Real-Time Object Detection in Robotics},
booktitle={Proceedings of the 1st International Conference on Research and Development in Information, Communication, and Computing Technologies - ICRDICCT`25},
year={2025},
pages={718-726},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0013942700004919},
isbn={978-989-758-777-1},
}

in EndNote Style

TY - CONF

JO - Proceedings of the 1st International Conference on Research and Development in Information, Communication, and Computing Technologies - ICRDICCT`25
TI - VLSI Implementation of Deep Learning Models for Real-Time Object Detection in Robotics
SN - 978-989-758-777-1
AU - Jayalakshmi D.
AU - Arivazhagi P.
AU - Dhivyalakshmi K.
PY - 2025
SP - 718
EP - 726
DO - 10.5220/0013942700004919
PB - SciTePress