GENETIC HEURISTICS FOR REDUCING MEMORY ENERGY CONSUMPTION IN EMBEDDED SYSTEMS

Maha Idrissi Aouad, René Schott, Olivier Zendra

2010

Abstract

Nowadays, reducing memory energy has become one of the top priorities of many embedded systems designers. Given the power, cost, performance and real-time advantages of Scratch-Pad Memories (SPMs), it is not surprising that SPM is becoming a common form of SRAM in embedded processors today. In this paper, we focus on heuristic methods for SPMs careful management in order to reduce memory energy consumption. We propose Genetic Heuristics for memory management which are, to the best of our knowledge, new original alternatives to the best known existing heuristic (BEH). Our Genetic Heuristics outperform BEH. In fact, experimentations performed on our benchmarks show that our Genetic Heuristics consume from 76.23% up to 98.92% less energy than BEH in different configurations. In addition they are easy to implement and do not require list sorting (contrary to BEH).

References

  1. Absar, J. and Catthoor, F. (2006). Analysis of scratch-pad and data-cache performance using statistical methods. In ASP-DAC, pages 820-825.
  2. Avissar, O., Barua, R., and Stewart, D. (2002). An optimal memory allocation scheme for scratch-pad-based embedded systems. Transaction. on Embedded Computing Systems., 1(1):6-26.
  3. Banakar, R., Steinke, S., Lee, B., Balakrishnan, M., and Marwedel, P. (2002). Scratchpad memory: design alternative for cache on-chip memory in embedded systems. In CODES, pages 73-78, New York, NY, USA. ACM Press.
  4. Ben Fradj, H., Ouardighi, A. E., Belleudy, C., and Auguin, M. (2005). Energy aware memory architecture configuration. In MEDEA 7804: Proceedings of the 2004 workshop on MEmory performance, volume 33, pages 3-9. ACM.
  5. Benini, L. and Micheli, G. D. (2000). System-level power optimization: techniques and tools. IEEE Design and Test, 17(2):74-85.
  6. Cassé, H. and Rochange, C. (2007). OTAWA, Open Tool for Adaptative WCET Analysis. In Design, Automation and Test in Europe (Poster session ”University Booth”) (DATE), Nice, 17/04/07- 19/04/07, page (electronic medium), http://www.dateconference.com/. DATE. Poster session.
  7. Graybill, R. and Melhem, R. (2002). Power aware computing. Kluwer Academic Publishers, Norwell, MA, USA.
  8. Guthaus, M. R., Ringenberg, J. S., Ernst, D., Austin, T. M., Mudge, T., and Brown, R. B. (2001). Mibench: A free, commercially representative embedded benchmark suite. In WWC 7801: Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop, pages 3-14, Washington, DC, USA. IEEE Computer Society.
  9. H. Kellerer, U. P. and Pisinger, D. (2004). Knapsack Problems. Springer, Berlin, Germany.
  10. Idrissi Aouad, M., Schott, R., and Zendra, O. (2010). A Tabu Search Heuristic for Scratch-Pad Memory Management. In ICSET'2010: Proceedings of International Conference on Software Engineering and Technology. To appear, in press.
  11. Idrissi Aouad, M. and Zendra, O. (2007). A Survey of Scratch-Pad Memory Management Techniques for low-power and -energy. In 2nd ECOOP Workshop on Implementation, Compilation, Optimization of Object-Oriented Languages, Programs and Systems (ICOOOLPS'2007).
  12. ITRS (2007). System drivers. http://www.itrs.net/Links/ 2007ITRS/2007 Chapters/2007 SystemDrivers.pdf.
  13. Panda, P. R., Dutt, N., and Nicolau, A. (1997). Efficient utilization of scratch-pad memory in embedded processor applications. In DATE.
  14. Sivanandam, S. N. and Deepa, S. N. (2007). Introduction to Genetic Algorithms. Springer Publishing Company, Incorporated.
  15. Sjödin, J., Fröderberg, B., and Lindgren, T. (1998). Allocation of global data objects in on-chip ram. In Workshop on Compiler and Architectural Support for Embedded Computer Systems. ACM.
  16. Steinke, S., Wehmeyer, L., Lee, B., and Marwedel, P. (2002). Assigning program and data objects to scratchpad for energy reduction. In DATE, page 409. IEEE Computer Society.
  17. Tanenbaum, A. (2005). Architecture de l'ordinateur 5e édition. Pearson Education.
  18. Truong, D. N., Bodin, F., and Seznec, A. (1998). Improving cache behavior of dynamically allocated data structures. In International Conference on Parallel Architectures and Compilation Techniques (IEEE PACT), pages 322-329.
  19. Udayakumaran, S., Narahari, B., and Simha, R. (2002). Application specific memory partitioning for low power. In ACM COLP 2002 (Compiler and Operating Systems for Low Power). ACM Press.
  20. Wehmeyer, L., Helmig, U., and Marwedel, P. (2004). Compiler-optimized usage of partitioned memories. In WMPI.
  21. Wilton, S. and Jouppi, N. (1996). Cacti: An enhanced cache access and cycle time model. IEEE Journal of SolidState Circuits.
  22. Zheng, Y. and Kiyooka, S. (1999). Genetic algorithm applications. http://www.me.uvic.ca/ zdong/courses/ mech620/GA App.PDF.
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Paper Citation


in Harvard Style

Idrissi Aouad M., Schott R. and Zendra O. (2010). GENETIC HEURISTICS FOR REDUCING MEMORY ENERGY CONSUMPTION IN EMBEDDED SYSTEMS . In Proceedings of the 5th International Conference on Software and Data Technologies - Volume 2: ICSOFT, ISBN 978-989-8425-23-2, pages 394-402. DOI: 10.5220/0003002503940402


in Bibtex Style

@conference{icsoft10,
author={Maha Idrissi Aouad and René Schott and Olivier Zendra},
title={GENETIC HEURISTICS FOR REDUCING MEMORY ENERGY CONSUMPTION IN EMBEDDED SYSTEMS},
booktitle={Proceedings of the 5th International Conference on Software and Data Technologies - Volume 2: ICSOFT,},
year={2010},
pages={394-402},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0003002503940402},
isbn={978-989-8425-23-2},
}


in EndNote Style

TY - CONF
JO - Proceedings of the 5th International Conference on Software and Data Technologies - Volume 2: ICSOFT,
TI - GENETIC HEURISTICS FOR REDUCING MEMORY ENERGY CONSUMPTION IN EMBEDDED SYSTEMS
SN - 978-989-8425-23-2
AU - Idrissi Aouad M.
AU - Schott R.
AU - Zendra O.
PY - 2010
SP - 394
EP - 402
DO - 10.5220/0003002503940402