
 
The micro controller is responsible for 
assembling the information, sent by the CPU, in 
order to drive the H-Bridge. It calculates the PWM 
ON / OFF times, generating the desired signal to the 
system output. 
The micro controller uses an 8MHz crystal. In 
order to generate a PWM signal that does not reach 
frequencies higher than 30kHz, the sampling 
frequency used by the micro controller is about 17 
times higher than the frequency of the output signal 
to ensure a low ripple at the filter output. 
An AT90USB1287 low-power CMOS 8-bit 
micro controller was used (Johnson and Tabasam, 
2003), based on the AVR with 64/128K bytes of ISP 
Flash and an USB device controller with full speed 
and low speed data transfer support, enhanced RISC 
architecture. By executing powerful instructions in a 
single clock cycle, the AT90USB1287 achieves 
throughputs approaching 1MIPS per MHz allowing 
the system designer to optimize power consumption 
versus processing speed. 
The interface between master and slave blocks is 
achieved by means of a USB connection due to is 
large bandwidth and Plug and Play interoperability. 
A full-duplex low speed (1.5Mbit/s) data rate 
connection is used that guarantees up to 512kbit/s of 
bandwidth in each direction. 
The Bus topology used is the Reduced Host 
Topology showed in figure 5 (Atmel, 2007). 
 
 
Figure 5: Reduced Host Topology. A reduced host 
controller has a unique USB port and does not handle full 
USB tree with hub. It means that a reduced host controller 
is designed to handle a unique point-to-point connection 
with an unique USB device. 
Its main characteristics are: 
USB Host: 
  There is only one host in any USB system, and 
it operates as the “master” of the USB bus; 
  The USB interface to the host system is referred 
to as the Host Controller. 
USB Device: 
  An USB device operates as a slave node on the 
USB bus; 
  Thanks to the USB hub (that also operates as an 
USB device) up to 127 devices can be 
connected on the USB bus. Each device is 
uniquely identified by a device address. 
It would be only necessary to implement a more 
elaborated connection topology if the micro 
controller interacts with more than one device 
because it would be necessary to guarantee that it 
communicates with the correct device. As this 
system is composed by just one device, the use of 
the simplified topology facilitates the 
implementation of the connection between the CPU 
and the micro controller. 
The micro controller output signal produces a 
peak voltage of 3.3V. To manage an effective 
treatment it is necessary to amplify this signal to 
higher levels, such as 54V. To carry out this task it 
was implemented an H-bridge with two quadrants, 
allowing the change of the signal output polarity 
according to the corresponding treatment. The H-
Bridge was implemented by means of L6225 DMOS 
Dual Full Bridge chip which combines isolated 
DMOS Power Transistors with CMOS and bipolar 
circuits on the same chip (STMicroelectronics, 
2007). Figure 6 shows the schematic diagram of this 
circuit. 
 
Figure 6: H-Bridge circuit based on BCD technology. 
Combines isolated DMOS Power Transistors with CMOS 
and bipolar circuits on the same chip. 
The signal output is a sum of two components: a 
low frequency of 0.07Hz (Period = 14s) and a high 
frequency of 1.8kHz. A low-pass active filter, with a 
Q factor of 2, and a cut-off frequency of 2kHz were 
used. Thus the filter output no longer presents the 
high frequency components, produced by the PWM 
modulator, and all variations of the sign are 
smoothed. Figure 7 shows the output waveform of 
the PWM modulator. Figure 8 depicts a time 
expansion between B1 and B2 bars of figure 7. 
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