POWER ESTIMATION FOR REGISTER TRANSFER LEVEL BY
GENETIC ALGORITHM
Yaseer A. Durrani, Teresa Riesgo, Felipe Machado
Universidad Politécnica de Madrid
E.T.S.I. Industriales. División de Ingeniería Electrónica
C/ José Gutiérrez Abascal, 2. 28006 Madrid (Spain)
Keywords: Power estimation, Macromodel, Signal statistics, Genetic algorithm.
Abstract: In this paper, we propose a new genetic algorithm (GA) based macromodeling technique for register
transfer level. This technique allows to estimate the power dissipation of intellectual property (IP)
components using some statistical knowledge of their primary inputs. During the macromodel construction
procedure, the sequence of an input stream is generated by a GA using input metrics. Then, a Monte Carlo
zero delay simulation is performed and the power dissipation is predicted by a macromodel function. In our
experiments with IP macro-blocks, the results are effective and highly correlated, with an average error of
1%. Our model is parameterizable and provides accurate power estimation.
1 INTRODUCTION
The importance of designing low power digital
circuits is being increased rapidly. In order to handle
the ever increasingly complexity, CAD tools have
been developed that also help in minimizing power
dissipation.
In this short paper, we focus on the problem of
power estimation at register transfer level (RTL) for
IP-based designs. Various power estimation
techniques have been introduced previously. These
techniques can be divided into two categories:
probabilistic and statistical. Probabilistic techniques
(Ghose et al, 1992), (Najm et al, 1990), (Marculescu
et al, 1994) use the probabilities of the input stream
and their propagation into the circuit to estimate the
internal switching activities. These techniques are
very efficient, but they cannot accurately capture
factors like glitch generation and propagation. On
the other hand in statistical techniques (Yacoub &
Ku, 1989), (Huizer, 1990), (Deng, 1994) the circuit
is simulated under randomly generated input
patterns and the power dissipation is monitored
using a power estimator. The Monte Carlo
simulation technique was developed and presented
in (Burch et al, 1993). This technique uses input
vectors that are randomly generated and its power
dissipation is estimated using power estimator.
A look-up table (LUT) based macromodel was
presented in (Gupta & Najm, 1997) and further
improved in (Gupta & Najm, 1999). The LUT stores
the estimates for equi-spaced discrete values of the
input signal statistics. The interpolation method was
introduced to allow the estimation for the input
statistics that not correspond to LUT. In (Chen et al,
1997), (Chen & Roy, 1998) interpolation scheme
was improved by using power sensitivity concept.
For better accuracy, numerous power
macromodeling techniques have been introduced in
(Gupta & Najm, 1999), (Liu & Papaefthymiou,
2002).
Genetic Algorithms (Davis, 1991) have proved
success in solving electronic design problems
(O’Dare & Arslan, 1994), (Arslan et al, 1996) and
have shown a high degree of flexibility in handling
power constraints (Davis, 1991). They are more
dynamic to combine power of randomness and
evolution, and to analyze large solution space.
In this paper, we present a new genetic algorithm
based power macromodeling technique for power
estimation. The input metrics of our macromodel are
the average input signal probability P
in, average
input transition density D
in, input spatial correlation
S
in and input temporal correlation Tin. We use
intellectual property (IP) macro-blocks for our
experiments.
527
A. Durrani Y., Riesgo T. and Machado F. (2006).
POWER ESTIMATION FOR REGISTER TRANSFER LEVEL BY GENETIC ALGORITHM.
In Proceedings of the Third International Conference on Informatics in Control, Automation and Robotics, pages 527-530
DOI: 10.5220/0001214205270530
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