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Authors: Cristian Vancea 1 ; Sergiu Nedevschi 1 ; Mihai Negru 1 and Stefan Mathe 2

Affiliations: 1 Technical University of Cluj-Napoca, Romania ; 2 University of Toronto, Canada

ISBN: 972-8865-40-6

ISSN: 2184-4321

Keyword(s): Image rectification, Pipeline hardware design, VHDL, FPGA.

Related Ontology Subjects/Areas/Topics: Computational Geometry ; Computer Vision, Visualization and Computer Graphics ; Image Formation and Preprocessing ; Image Formation, Acquisition Devices and Sensors ; Implementation of Image and Video Processing Systems ; Multi-View Geometry

Abstract: Image rectification is the process of transforming stereo-images as if they were captured using a canonical stereo-system. Computationally intensive tasks, like dense stereo matching, are greatly simplified if performed on rectified images. We developed an efficient pipeline hardware machine which performs real-time image rectification. The design was implemented using VHDL, thus allowing portability on many hardware platforms. The architecture was highly optimized, both in terms of time and resources needed. To increase its flexibility, the design was described based on generics (configuration parameters), which allow reconfiguring different characteristics and behaviour, such as: image size, number of precision bits, memory cache complexity. We also analyze the performance of the implemented solution on a VirtexE600 FPGA device.

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Paper citation in several formats:
Vancea, C.; Nedevschi, S.; Negru, M. and Mathe, S. (2006). REAL-TIME FPGA-BASED IMAGE RECTIFICATION SYSTEM. In Proceedings of the First International Conference on Computer Vision Theory and Applications - Volume 1: VISAPP, ISBN 972-8865-40-6; ISSN 2184-4321, pages 93-100. DOI: 10.5220/0001369500930100

@conference{visapp06,
author={Cristian Vancea. and Sergiu Nedevschi. and Mihai Negru. and Stefan Mathe.},
title={REAL-TIME FPGA-BASED IMAGE RECTIFICATION SYSTEM},
booktitle={Proceedings of the First International Conference on Computer Vision Theory and Applications - Volume 1: VISAPP,},
year={2006},
pages={93-100},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0001369500930100},
isbn={972-8865-40-6},
issn={2184-4321},
}

TY - CONF

JO - Proceedings of the First International Conference on Computer Vision Theory and Applications - Volume 1: VISAPP,
TI - REAL-TIME FPGA-BASED IMAGE RECTIFICATION SYSTEM
SN - 972-8865-40-6
IS - 2184-4321
AU - Vancea, C.
AU - Nedevschi, S.
AU - Negru, M.
AU - Mathe, S.
PY - 2006
SP - 93
EP - 100
DO - 10.5220/0001369500930100

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