Authors:
Giovanni Agosta
1
;
Alessandro Barenghi
2
;
Tomasz Ciesielczyk
3
;
Rahul Dutta
4
;
William Fornaciari
1
;
Thierry Goubier
5
;
Jens Hagemeyer
6
;
Lars Kosmann
7
;
Nicholas Mainardi
1
;
Ariel Oleksiak
3
;
Gerardo Pelosi
2
;
Wojciech Piatek
3
;
Christian Pieper
8
;
Mario Porrmann
6
;
Daniel Schlitt
8
and
Michele Zanella
1
Affiliations:
1
DEIB, Politecnico di Milano, Italy
;
2
Politecnico di Milano, Italy
;
3
Poznan Supercomputing and Networking Center, Poland
;
4
Huawei Technologies GmbH, Germany
;
5
Institut List, CEA, Paris-Saclay University, France
;
6
CITEC, Bielefeld University, Germany
;
7
CEWE Stifung & Co. KGaA, Germany
;
8
OFFIS e. V., Germany
Abstract:
The H2020 project Modular Microserver DataCentre (M2DC) investigates,
develops and demonstrates a modular, highly-efficient, cost-optimized
server architecture composed of heterogeneous microserver computing resources.
The M2DC architecture can be tailored to meet requirements from various application
domains such as image processing, cloud computing or HPC. To achieve
this, M2DC is built on three pillars. (1) The RECSjBox, a flexible server architecture
fully configurable with respect to application requirements supports the
full range of microserver technologies, including low power ARM processors or
FPGA accelerators as well as high performance x86 or GPU devices. (2) Advanced
management strategies as well as system efficiency enhancements (SEE)
improve the behaviour of the system during runtime, thereby addressing application
acceleration, communications and monitoring & management. Moreover, an
intelligent management module complements the middleware by proactive workload,
therm
al and power management to increase the energy efficiency. (3) Welldefined
interfaces to the software ecosystem enable easy integration of the customized
RECSjBox system into the existing data centre landscape. By integrating
into OpenStack for bare metal orchestration of the microservers, the applicability
in today’s data centre is granted. Current project results include new microserver
designs based on ARM64 and Intel Stratix 10. The document presents TCO estimations
and baseline benchmarks to show the high potential of accelerators
for the targeted applications including image processing, Internet-of-things (IoT)
data processing and others.
(More)