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Authors: Marcin Pietron ; Maciej Wielgosz and Kazimierz Wiatr

Affiliation: AGH University of Science and Technology and ACK Cyfronet AGH, Poland

ISBN: 978-989-758-172-4

Keyword(s): Artificial Intelligence, GPGPU Computing, Hierarchical Temporal Memory, Machine Learning, Neocortex.

Related Ontology Subjects/Areas/Topics: Artificial Intelligence ; Biomedical Engineering ; Biomedical Signal Processing ; Computational Intelligence ; Data Manipulation ; Data Mining ; Databases and Information Systems Integration ; Enterprise Information Systems ; Evolutionary Computing ; Health Engineering and Technology Applications ; Human-Computer Interaction ; Knowledge Discovery and Information Retrieval ; Knowledge-Based Systems ; Machine Learning ; Methodologies and Methods ; Neurocomputing ; Neurotechnology, Electronics and Informatics ; Pattern Recognition ; Physiological Computing Systems ; Sensor Networks ; Signal Processing ; Soft Computing ; Symbolic Systems

Abstract: Hierarchical Temporal Memory is a structure that models some of the structural and algorithmic properties of the neocortex. HTM is a biological model based on the memory-prediction theory of brain. HTM is a method for discovering and learning of observed input patterns and sequences, building an increasingly complex models. HTM combines and extends approaches used in sparse distributed memory, bayesian networks, spatial and temporal clustering algorithms, using a tree-shaped hierarchy neural networks. It is quite a new model of deep learning process, which is very efficient technique in artificial intelligence algorithms. HTM like other deep learning models (Boltzmann machine, deep belief networks etc.) has structure which can be efficiently processed by parallel machines. Modern multi-core processors with wide vector processing units (SSE, AVX), GPGPU are platforms that can tremendously speed up learning, classifying or clustering algorithms based on deep learning models (e.g. Cuda T oolkit 7.0). The current bottleneck of this new flexible artifficial intelligence model is efficiency. This article focuses on parallel processing of HTM learning algorithms in parallel hardware platforms. This work is the first one about implementation of HTM architecture and its algorithms in hardware accelerators. The article doesn’t study quality of the algorithm. (More)

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Paper citation in several formats:
Pietron, M.; Wielgosz, M. and Wiatr, K. (2016). Parallel Implementation of Spatial Pooler in Hierarchical Temporal Memory.In Proceedings of the 8th International Conference on Agents and Artificial Intelligence - Volume 2: ICAART, ISBN 978-989-758-172-4, pages 346-353. DOI: 10.5220/0005706603460353

@conference{icaart16,
author={Marcin Pietron. and Maciej Wielgosz. and Kazimierz Wiatr.},
title={Parallel Implementation of Spatial Pooler in Hierarchical Temporal Memory},
booktitle={Proceedings of the 8th International Conference on Agents and Artificial Intelligence - Volume 2: ICAART,},
year={2016},
pages={346-353},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0005706603460353},
isbn={978-989-758-172-4},
}

TY - CONF

JO - Proceedings of the 8th International Conference on Agents and Artificial Intelligence - Volume 2: ICAART,
TI - Parallel Implementation of Spatial Pooler in Hierarchical Temporal Memory
SN - 978-989-758-172-4
AU - Pietron, M.
AU - Wielgosz, M.
AU - Wiatr, K.
PY - 2016
SP - 346
EP - 353
DO - 10.5220/0005706603460353

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