Authors:
Qiufei Yan
1
;
Bin Lin
1
and
Qiang Chen
2
Affiliations:
1
The 723 Institute of CSIC, China
;
2
Keyword(s):
sub-array adaptive digital beam forming, low side lobe, Systolic array, CORDIC algorithm
Abstract:
Most of the research on adaptive digital beam forming method is based on the array-level array, but the array-level adaptive digital beam forming requires that each array element have a receiving channel, and the adaptive digital beam forming is formed at the array level. The phased array antenna usually includes hundreds or even thousands of array elements. If the array-level adaptive digital beam forming is adopted, the operation amount is large and the hardware complexity is high. Therefore, a large phased array antenna generally adopts an array structure in the form of a sub-array. A number of adjacent array elements are combined into one sub-array, and an adaptive digital beam forming is performed in the sub-array, thereby reducing the hardware complexity and reducing the computation Quantity, and can achieve good anti-jamming performance. In this paper, the algorithm is implemented using Systolic array algorithm, which can reduce the computational complexity of parallel computi
ng. When using FPGA to realize the coordinate rotation algorithm is used to improve the parallel computing speed.
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