loading
Papers Papers/2022 Papers Papers/2022

Research.Publish.Connect.

Paper

Paper Unlock

Authors: Simone Bongiovanni ; Giuseppe Scotti and Alessandro Trifiletti

Affiliation: Sapienza Università di Roma, Italy

Keyword(s): Cryptography, Cryptographic Hardware, Smart Cards, Side Channel Attacks, Differential Power Analysis (DPA), Dual-rail Pre-charge Logic (DPL), Hiding Countermeasure, Early Evaluation Effect, VLSI Design.

Related Ontology Subjects/Areas/Topics: Information and Systems Security ; Information Assurance ; Information Hiding ; Security in Information Systems ; Security Metrics and Measurement

Abstract: Delay-based Dual-rail Pre-charge Logic (DDPL) has been introduced for counteracting power analysis attacks. Basically DDPL allows to achieve a constant power consumption for each data transition even in presence of capacitive load mismatches, thanks to an asynchronous two-phases evaluation. Unlikely other secure logic styles, in DDPL the clock frequency does not fix the security level since it depends on the value of the delay Δ between the complementary signals, which can be designed to be lower than 1ns using current CMOS technologies. However no works exist in which the DPA-resistance of DDPL is tested in presence of early evaluation, due to the different arrival times of the signals. The aim of this work is to provide and validate through transistor level simulations a theoretical model of the variations of the delay Δ during the evaluation phase for each possible data configuration in order to assess the effect of the early evaluation in DDPL, and to design early evaluation free DDPL gates. Moreover a case study crypto-core implemented both with basic and optimized DDPL gates has been designed in which a Correlation Frequency Power Analysis (CFPA) attack is mounted so to detect any leakage on simulated current traces. (More)

CC BY-NC-ND 4.0

Sign In Guest: Register as new SciTePress user now for free.

Sign In SciTePress user: please login.

PDF ImageMy Papers

You are not signed in, therefore limits apply to your IP address 3.231.146.172

In the current month:
Recent papers: 100 available of 100 total
2+ years older papers: 200 available of 200 total

Paper citation in several formats:
Bongiovanni, S.; Scotti, G. and Trifiletti, A. (2013). Security Evaluation and Optimization of the Delay-based Dual-rail Pre-charge Logic in Presence of Early Evaluation of Data. In Proceedings of the 10th International Conference on Security and Cryptography (ICETE 2013) - SECRYPT; ISBN 978-989-8565-73-0; ISSN 2184-3236, SciTePress, pages 183-194. DOI: 10.5220/0004526501830194

@conference{secrypt13,
author={Simone Bongiovanni. and Giuseppe Scotti. and Alessandro Trifiletti.},
title={Security Evaluation and Optimization of the Delay-based Dual-rail Pre-charge Logic in Presence of Early Evaluation of Data},
booktitle={Proceedings of the 10th International Conference on Security and Cryptography (ICETE 2013) - SECRYPT},
year={2013},
pages={183-194},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0004526501830194},
isbn={978-989-8565-73-0},
issn={2184-3236},
}

TY - CONF

JO - Proceedings of the 10th International Conference on Security and Cryptography (ICETE 2013) - SECRYPT
TI - Security Evaluation and Optimization of the Delay-based Dual-rail Pre-charge Logic in Presence of Early Evaluation of Data
SN - 978-989-8565-73-0
IS - 2184-3236
AU - Bongiovanni, S.
AU - Scotti, G.
AU - Trifiletti, A.
PY - 2013
SP - 183
EP - 194
DO - 10.5220/0004526501830194
PB - SciTePress