Exploiting Exclusive Higher Resolution to Enhance Response Time of Embedded Flash Storage

Jung-Hoon Kim, Young-Sik Lee

Abstract

NAND flash-based embedded storage may spend a long time on responding to a host storage system. Most of the flash translation layers (FTLs) of the embedded flash storage utilize a granular page-mapping level. However, they did not pay heed to page mapping management that causes the internal overhead of the page-level FTL. This overhead might damage the response time, especially after the random writes to the embedded flash storage. In this paper, we propose a novel method to reduce the internal overhead related to the page mapping write. This method exploits a virtually-shrunk segment exclusively to the page mapping table, which is implemented by our mapping-segmented flash translation layer (MSFTL). One mapping segment is intrinsically composed of consecutive page mappings smaller in size than a logical page of the host system. As a result, MSFTL drastically reduces the amount of page mapping data written and therefore improves both the average and worst response time compared with the fine-granularity page-level FTLs.

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