POWER ESTIMATION FOR REGISTER TRANSFER LEVEL BY GENETIC ALGORITHM

Yaseer A. Durrani, Teresa Riesgo, Felipe Machado

2006

Abstract

In this paper, we propose a new genetic algorithm (GA) based macromodeling technique for register transfer level. This technique allows to estimate the power dissipation of intellectual property (IP) components using some statistical knowledge of their primary inputs. During the macromodel construction procedure, the sequence of an input stream is generated by a GA using input metrics. Then, a Monte Carlo zero delay simulation is performed and the power dissipation is predicted by a macromodel function. In our experiments with IP macro-blocks, the results are effective and highly correlated, with an average error of 1%. Our model is parameterizable and provides accurate power estimation.

References

  1. Ghose, A. A., Devdas, S., Keutzer, K., & White, J., June 1992. Estimation of average switching activity in combinational and sequential circuits. In Proceedings of the 29th Design Automation Conference, pages 253- 259.
  2. Marculescu, R., Marculescu, D., & Pedram, M., November 1994. Logic level power estimation considering spatiotemporal correlations. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 224-228.
  3. Yacoub, G.Y., & Ku, W. H., 1989. An accurate simulation technique for short-circuit power dissipation. In Proceedings of International Symposium on Circuits and Systems, pages 1157-1161.
  4. Deng, C., April 1994. Power analysis for CMOS/BiCMOS circuits. In Proceedings of 1994 International Workshop on Low Power Design, pages 3-8.
  5. Burch, R., Najm, N. F., Yang, P., & Trick, T., March 1993. A Monte Carlo approach for power estimation. IEEE Transactions on VLSI Systems, 1(1):63-71.
  6. Gupta, S., & Najm, F. N., June 1997. Power macromodeling for high level power estimation. In Proceeding 34th Design Automation Conference.
  7. Gupta, S., & Najm, F. N., March 1999. Analytical model for high level power modelling of combinational and sequential circuits. In Proceeding IEEE Alessandro Volta Workshop on Low Power Design.
  8. Chen, Z., Roy, K., & Chou, T. L., Nov. 1997. Power sensitivity-a new method to estimate power dissipation considering uncertain specifications of primary inputs. In Proceeding IEEE International Conference on Computer Aided Design.
  9. Chen, Z., & Roy. K., June 1998. A power macromodeling technique based on power sensitivity. In Proceeding 35th Design Automation Conference.
  10. Gupta, S., & Najm, F. N., 1999. Power Macromodeling for High Level Power Estimation. In Proceeding IEEE Transactions on VLSI.
  11. Liu, X., & Papaefthymiou, M. C., May, 2002. Incorporation of input glitches into power macromodeling. In Proceeding IEEE Inter. Symp. On Circuits and Systems.
  12. Davis, L., 1991. Handbook of Genetic Algorithm. Van Nostrand Reinhold, New York.
  13. O'Dare, M.J., & Arslan, T., May 1994. Generating test patterns for VLSI circuits using a Genetic Algorithm. In Proceeding IEE Electronics Letters, Vol. 30, No. 10, pp. 778-779.
  14. Arslan, T., Horrocks, D. H., Ozdemir, E., 1996. Structural cell-based VLSI circuit design using a Genetic Algorithm. International symposium on circuits and systems, Atlanta, USA.
Download


Paper Citation


in Harvard Style

A. Durrani Y., Riesgo T. and Machado F. (2006). POWER ESTIMATION FOR REGISTER TRANSFER LEVEL BY GENETIC ALGORITHM . In Proceedings of the Third International Conference on Informatics in Control, Automation and Robotics - Volume 2: ICINCO, ISBN 978-972-8865-60-3, pages 527-530. DOI: 10.5220/0001214205270530


in Bibtex Style

@conference{icinco06,
author={Yaseer A. Durrani and Teresa Riesgo and Felipe Machado},
title={POWER ESTIMATION FOR REGISTER TRANSFER LEVEL BY GENETIC ALGORITHM},
booktitle={Proceedings of the Third International Conference on Informatics in Control, Automation and Robotics - Volume 2: ICINCO,},
year={2006},
pages={527-530},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0001214205270530},
isbn={978-972-8865-60-3},
}


in EndNote Style

TY - CONF
JO - Proceedings of the Third International Conference on Informatics in Control, Automation and Robotics - Volume 2: ICINCO,
TI - POWER ESTIMATION FOR REGISTER TRANSFER LEVEL BY GENETIC ALGORITHM
SN - 978-972-8865-60-3
AU - A. Durrani Y.
AU - Riesgo T.
AU - Machado F.
PY - 2006
SP - 527
EP - 530
DO - 10.5220/0001214205270530