Model Execution and Debugging - A Process to Leverage Existing Tools

Faiez Zalila, Eric Jenn, Marc Pantel

2017

Abstract

Model checking is an effective technique for the verification of critical systems. However, it relies on behavioral models which are costly to write and maintain. Thus, those models shall be validated and debugged thoroughly, and simulation, i.e. model execution, can be used for that purpose. To reduce the development costs of simulators and ensure their behavioral consistency with model verifiers, we advocate the reuse of parts of the model verification tool-chain to implement them. To support this claim, this paper proposes a method illustrated with a realistic case study applied to FIACRE behavioral models. The approach relies on the creation and exploitation of relations between models representing the information required by the user on the one hand, and information produced by the tools, on the other hand.

References

  1. Abid, N., Dal Zilio, S., and Le Botlan, D. (2014). A formal framework to specify and verify real-time properties on critical systems. Int. J. Crit. Comput.-Based Syst., 5(1/2):4-30.
  2. Berthomieu, B., Bodeveix, J.-P., Dal Zilio, S., Dissaux, P., Filali, M., Gaufillet, P., Heim, S., and Vernadat, F. (2010). Formal Verification of AADL models with FIACRE and TINA. In ERTSS 2010 , pages 1-9, Toulouse, France.
  3. Berthomieu, B., Bodeveix, J.-P., Filali, M., Farail, P., Gaufillet, P., Garavel, H., and Lang, F. (2008). FIACRE: an Intermediate Language for Model Verification in the TOPCASED Environment. In 4th European Congress ERTS Embedded Real-Time Software (2008).
  4. Berthomieu, B., Ribet, P.-O., and Vernadat, F. (2004). The tool TINA - construction of abstract state spaces for Petri nets and time Petri nets. International Journal of Production Research, 42(14):2741-2756.
  5. Bodeveix, J.-P., Filali, M., Garnacho, M., Spadotti, R., and Yang, Z. (2015). Towards a verified transformation from AADL to the formal component-based language FIACRE. Science of Computer Programming, 106:30 - 53. Special Issue: Architecture-Driven Semantic Analysis of Embedded Systems.
  6. Bourdil, P.-A., Dal Zilio, S., and Jenn, E. (2016a). Integrating Model Checking in an Industrial Verification Process: a Structuring Approach. LAAS report n?16115. https://hal.archives-ouvertes.fr/hal-01341701.
  7. Bourdil, P.-A., Jenn, E., and Dal Zilio, S. (2016b). Building Confidence on Formal Verification Models. In Fast Abstracts at International Conference on Computer Safety, Reliability, and Security (SAFECOMP), Trondheim, Norway.
  8. Combemale, B., Brun, C., Champeau, J., Crégut, X., Deantoni, J., and Le Noir, J. (2016). A Tool-Supported Approach for Concurrent Execution of Heterogeneous Models. In 8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Toulouse, France.
  9. Cranen, S., Groote, J. F., Keiren, J. J. A., Stappers, F. P. M., de Vink, E. P., Wesselink, W., and Willemse, T. A. C. (2013). An Overview of the mCRL2 Toolset and Its Recent Advances, pages 199-213. Springer Berlin Heidelberg, Berlin, Heidelberg.
  10. Farines, J.-M., De Queiroz, M. H., De Rocha, V., Carpes, A. M., Vernadat, F., and Crégut, X. (2011). A ModelDriven Engineering Approach to Formal Verification of PLC programs (regular paper). In Emerging Technologies and Factory Automation (ETFA), Toulouse, France, pages 1-8. IEEE.
  11. Mayerhofer, T., Langer, P., Wimmer, M., and Kappel, G. (2013). xMOF: Executable DSMLs Based on fUML, pages 56-75. Springer International Publishing, Cham.
  12. Prosvirnova, T., Batteux, M., Brameret, P.-A., Cherfi, A., Friedlhuber, T., Roussel, J.-M., and Rauzy, A. (2013). The AltaRica 3.0 project for model-based safety assessment. IFAC Proceedings Volumes, 46(22):127 - 132.
  13. Rangra, S. and Gaudin, E. (2014). SDL to FIACRE translation. In Embedded Real-Time Software and Systems (ERTS 2014).
  14. Rodrigues, L., Y, M. G., and Rufino, J. (1998). Faulttolerant clock synchronization in can. In In Proc. of the 19th Real-Time Systems Symposium (RTSS, pages 420-429. IEEE Computer Society Press.
  15. Rosu, G. (2013). Specifying languages and verifying programs with k. In Proceedings of 15th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC'13), IEEE/CPS. IEEE.
  16. Visser, W., Dwyer, M. B., and Whalen, M. (2012). The Hidden Models of Model Checking. Software & Systems Modeling, 11(4):541-555.
  17. Zalila, F., Crégut, X., and Pantel, M. (2012). Verification results feedback for FIACRE intermediate language. In Conférence en Ingénierie du Logiciel (CIEL).
  18. Zalila, F., Crégut, X., and Pantel, M. (2013). Formal verification integration approach for DSML. In Moreira, A., Schätz, B., Gray, J., Vallecillo, A., and Clarke, P., editors, Model-Driven Engineering Languages and Systems, volume 8107 of Lecture Notes in Computer Science, pages 336-351. Springer Berlin Heidelberg.
Download


Paper Citation


in Harvard Style

Zalila F., Jenn E. and Pantel M. (2017). Model Execution and Debugging - A Process to Leverage Existing Tools . In Proceedings of the 5th International Conference on Model-Driven Engineering and Software Development - Volume 1: MODELSWARD, ISBN 978-989-758-210-3, pages 401-408. DOI: 10.5220/0006143104010408


in Bibtex Style

@conference{modelsward17,
author={Faiez Zalila and Eric Jenn and Marc Pantel},
title={Model Execution and Debugging - A Process to Leverage Existing Tools},
booktitle={Proceedings of the 5th International Conference on Model-Driven Engineering and Software Development - Volume 1: MODELSWARD,},
year={2017},
pages={401-408},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0006143104010408},
isbn={978-989-758-210-3},
}


in EndNote Style

TY - CONF
JO - Proceedings of the 5th International Conference on Model-Driven Engineering and Software Development - Volume 1: MODELSWARD,
TI - Model Execution and Debugging - A Process to Leverage Existing Tools
SN - 978-989-758-210-3
AU - Zalila F.
AU - Jenn E.
AU - Pantel M.
PY - 2017
SP - 401
EP - 408
DO - 10.5220/0006143104010408