Authors:
Daniela Genius
1
and
Ludovic Apvrille
2
Affiliations:
1
Sorbonne Université, LIP6, CNRS UMR 7606, Paris, France
;
2
LTCI, Télécom Paris, Institut Polytechnique de Paris, Paris, France
Keyword(s):
Virtual Prototyping, System-Level Design, Multiplicity, Design Space Exploration.
Abstract:
Model-based design for large applications, especially the mapping of applications’ tasks to execution nodes, remains a challenge. In this paper, we explore applications comprising multiple identical software tasks intended for deployment across diverse execution nodes. While these tasks are expected to have a unified representation in their SysML-like block diagrams, each must be specifically mapped to individual processor cores to achieve granular performance optimization. Additionally, inter-task communications should be allocated across multiple channels. We further demonstrate a method for automatically generating parallel POSIX C code suitable for a multiprocessor-on-chip. Our approach has proven especially effective for high-performance streaming applications, notably when such applications have a master-worker task structure.