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Authors: Shinsaku Kiyomoto 1 ; Toshiaki Tanaka 1 and Kouichi Sakurai 2

Affiliations: 1 KDDI R & D Laboratories Inc., Japan ; 2 Kyushu University, Japan

Keyword(s): Stream Cipher, K2, Pseudorandom Generator, Hardware Implementation, FPGA.

Related Ontology Subjects/Areas/Topics: Coding Theory and Practice ; Cryptographic Techniques and Key Management ; Information and Systems Security

Abstract: K2 is a new type of word oriented stream cipher that has dynamic feedback control. Existing research has shown that K2 v2.0 is a high performance stream cipher in software implementations and can be used in several applications. However, no evaluation results for its performance in hardware implementations have been published. In this paper, we presented two hardware implementations of K2 v2.0: a high speed implementation and a compact implementation. We then show the evaluation results on FPGA implementation simulations. The implementations of K2 demonstrated high efficiency compared with other stream ciphers, with K2 being 4-10 times higher than AES implementations. We think that the FPGA implementation of K2 is suitable for applications using high speed encryption/decryption.

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Paper citation in several formats:
Kiyomoto, S.; Tanaka, T. and Sakurai, K. (2008). FPGA-TARGETED HARDWARE IMPLEMENTATIONS OF K2. In Proceedings of the International Conference on Security and Cryptography (ICETE 2008) - SECRYPT; ISBN 978-989-8111-59-3; ISSN 2184-3236, SciTePress, pages 270-277. DOI: 10.5220/0001917002700277

@conference{secrypt08,
author={Shinsaku Kiyomoto. and Toshiaki Tanaka. and Kouichi Sakurai.},
title={FPGA-TARGETED HARDWARE IMPLEMENTATIONS OF K2},
booktitle={Proceedings of the International Conference on Security and Cryptography (ICETE 2008) - SECRYPT},
year={2008},
pages={270-277},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0001917002700277},
isbn={978-989-8111-59-3},
issn={2184-3236},
}

TY - CONF

JO - Proceedings of the International Conference on Security and Cryptography (ICETE 2008) - SECRYPT
TI - FPGA-TARGETED HARDWARE IMPLEMENTATIONS OF K2
SN - 978-989-8111-59-3
IS - 2184-3236
AU - Kiyomoto, S.
AU - Tanaka, T.
AU - Sakurai, K.
PY - 2008
SP - 270
EP - 277
DO - 10.5220/0001917002700277
PB - SciTePress