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Authors: Finn Krewer ; Aedan Coffey ; Frank Callaly and Fearghal Morgan

Affiliation: National University of Ireland, Ireland

Keyword(s): Brain-Inspired Computation, Nervous System Emulation, Biological Neural Networks, Spiking Neural Networks, Field-Programmable Gate Arrays, NeuroML and Low Entropy Model Specification.

Abstract: This paper presents the LEMS2HDL toolsuite which converts Low Entropy Model Specification (LEMS) neuron/neural network models to synthesisable Hardware Description Language (HDL) hardware descriptions. The LEMS2HDL process will provide a route for the neuroscience community to perform accelerated Field-Programmable Gate Array (FPGA) hardware implementations of the growing library of LEMS neuron/neural network models. The paper describes the LEMS to HDL conversion process and references the previously reported vicilogic platform. The paper compares the resulting FPGA hardware simulation of three LEMS neuron models with the LEMS model simulation.

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Paper citation in several formats:
Krewer, F.; Coffey, A.; Callaly, F. and Morgan, F. (2014). Neuron Models in FPGA Hardware - A Route from High Level Descriptions to Hardware Implementations. In Proceedings of the 2nd International Congress on Neurotechnology, Electronics and Informatics (NEUROTECHNIX 2014) - NeBICA; ISBN 978-989-758-056-7, SciTePress, pages 177-183. DOI: 10.5220/0005190501770183

@conference{nebica14,
author={Finn Krewer. and Aedan Coffey. and Frank Callaly. and Fearghal Morgan.},
title={Neuron Models in FPGA Hardware - A Route from High Level Descriptions to Hardware Implementations},
booktitle={Proceedings of the 2nd International Congress on Neurotechnology, Electronics and Informatics (NEUROTECHNIX 2014) - NeBICA},
year={2014},
pages={177-183},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0005190501770183},
isbn={978-989-758-056-7},
}

TY - CONF

JO - Proceedings of the 2nd International Congress on Neurotechnology, Electronics and Informatics (NEUROTECHNIX 2014) - NeBICA
TI - Neuron Models in FPGA Hardware - A Route from High Level Descriptions to Hardware Implementations
SN - 978-989-758-056-7
AU - Krewer, F.
AU - Coffey, A.
AU - Callaly, F.
AU - Morgan, F.
PY - 2014
SP - 177
EP - 183
DO - 10.5220/0005190501770183
PB - SciTePress