A Workflow Model For Integrating IC Design and Testing

Andres Mellik

Abstract

This paper outlines the challenges facing the domain of automated testing of mixed-signal integrated circuits and how these can be tackled by enhancing communication between the design and test engineers. An abstract workflow model is introduced for seem-less interaction of design and test teams, thus enabling faster work-flow and a greater redundancy in the correctness of communicated specification data. The latter is embedded into a system-level model and completely integrated into the process. A data-sheet integration methodology is briefly introduced with several application-level requirements and integration guidelines. The goal is to reduce the time for developing and running test programs, which is a major cost factor in the reducing life-cycles of mixed-signal devices. The paper emphasizes obstacles in current settings and suggests workarounds.

References

  1. J.A.Ochoa and J.R.Porter, “Semiconductor Test Strategies”, IEEE Instrumentation & Measurement Magazine, pp.20-25, March 2003.
  2. M. Bushnell and V. Agrawal, “Essentials of Electronic Testing for Digital, Memory, and Mixed-Signal VLSI Circuits”. Norwell, MA: Kluwer, 2000.
  3. S. Ozev and A. Orailoglu, „Path-Based Test Composition for Mixed-signal SOC's“ , Southwest Symposium on Mixed Signal Design, San Diego, CA, pp. 153-158, February 2000.
  4. Mathworks, “Model-Based Design of Embedded Control System Software” URL: http://www.mathworks.com/wbnr5216, November 2004.
  5. S. Ozev and A. Orailoglu, „Automated System-Level Test Development for Mixed-Signal Circuits“, International Journal on Analog Integrated Circuits and Signal Processing, v. 35, n.2-3, pp. 169-178, May-June 2003.
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Paper Citation


in Harvard Style

Mellik A. (2005). A Workflow Model For Integrating IC Design and Testing . In Proceedings of the 2nd International Workshop on Computer Supported Activity Coordination - Volume 1: CSAC, (ICEIS 2005) ISBN 972-8865-21-X, pages 103-108. DOI: 10.5220/0002558901030108


in Bibtex Style

@conference{csac05,
author={Andres Mellik},
title={A Workflow Model For Integrating IC Design and Testing},
booktitle={Proceedings of the 2nd International Workshop on Computer Supported Activity Coordination - Volume 1: CSAC, (ICEIS 2005)},
year={2005},
pages={103-108},
publisher={SciTePress},
organization={INSTICC},
doi={10.5220/0002558901030108},
isbn={972-8865-21-X},
}


in EndNote Style

TY - CONF
JO - Proceedings of the 2nd International Workshop on Computer Supported Activity Coordination - Volume 1: CSAC, (ICEIS 2005)
TI - A Workflow Model For Integrating IC Design and Testing
SN - 972-8865-21-X
AU - Mellik A.
PY - 2005
SP - 103
EP - 108
DO - 10.5220/0002558901030108